The present invention relates to electronic circuits, and more particularly, clock switch-over circuits and methods for providing a clock signal to a clock routing network.
Field programmable gate arrays (FPGAs) are programmable logic integrated circuits that contain numerous programmable logic blocks and programmable interconnects. An FPGA user can configure an FPGA after it has been manufactured to implement a variety of different chip designs.
Clock routing networks, which are also known as clock trees, are used in integrated circuits to distribute clock signals. In conventional clock routing networks, input-clock signals are received through dedicated clock-input pins. The clock signals are then distributed through the integrated circuit using a network of lines and drivers.
An FPGA can be configured to implement a design that requires a clock routing network to switch between two different clock signals. The Stratix® II FGPA manufactured by Altera Corporation of San Jose, Calif. has a clock switch-over circuit. The clock switch-over circuit has a clock switch-over multiplexer and a glitch-free mode that uses one enable register to enable or disable a clock signal in response to a core logic signal. However, the clock switch-over circuit cannot be configured to satisfy a specific configuration of a particular FPGA circuit design.
Therefore, it would be desirable to provide a more flexible clock switch-over circuit that can be configured to implement features of particular circuit designs.